Intel® Many Integrated Core Architecture (Intel® MIC Architecture) – Advanced







Using standard programming languages

Intel® Many Integrated Core Architecture (Intel® MIC Architecture) products give developers a key advantage: They run on standard, existing programming tools and methods.
Intel MIC Architecture combines many Intel® processor cores onto a single chip. Developers interested in programming these cores can use standard C, C++, and FORTRAN source code. The same program source code written for Intel® MIC Products can be compiled and run on a standard Intel® Xeon® processor. Familiar programming models remove training barriers, allowing the developer to focus on the problems rather than software engineering.
Consider the case of mapping Earth and satellite imagery in applications like Google Earth*. Creating the images requires clear, well-lit conditions. However, “backprojection”-based Synthetic Aperture Radar (SAR) computation can image Earth at night, through clouds and trees, and provides information on surface materials. It works by collecting radar data from planes circling areas, which is turned into an image through intense calculation. Using Intel Xeon processors and the Intel® Xeon Phi coprocessor, Intel Labs and others demonstrate potential for five times reduction in compute cost using “backprojection,” while also simplifying data collection through optimized flight paths and shape targeting.
Intel® Many Integrated Core

Processor speed jumps exponentially

Intel® Many Integrated Core Architecture (Intel® MIC Architecture) ushers in a new era of supercomputing speed, performance, and compatibility. Now developers can create platforms running at trillions of calculations per second using the fast and familiar Intel® Xeon® processor and Intel® Xeon Phi™ coprocessor based on the new architecture.
This is an exponential leap forward. Now that supercomputers have broken the petaflop barrier, Intel already foresees a combination of Intel Xeon processors and Intel Xeon Phi coprocessors surpassing the next big milestone: the exaflop or 1,000 petaflop barrier.

source: intel.com
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